NVIDIA is consolidating its position as the infrastructure layer for AI-driven engineering workflows, not by building end-user products but by embedding itself deeper into the tools engineers already use. The Vera CPU announcement shows the company optimizing its own silicon for EDA applications in collaboration with Cadence and Synopsys, the two dominant players in chip design software. This is infrastructure eating infrastructure: NVIDIA is making it cheaper and faster for competitors to design chips that will compete with NVIDIA's own products. Simultaneously, the Agent Toolkit expansion with PhysicsNeMo and CUDA-X libraries signals a different strategy, packaging domain-specific AI capabilities as modular components that developers can bolt into their existing workflows. Both moves avoid the appearance of vertical integration while achieving it through dependency. NVIDIA is not trying to replace Cadence or Synopsys; it is making sure that whatever tools engineers choose, NVIDIA's silicon and software libraries become the path of least resistance. The company wins either way: through the hardware that runs the tools, the libraries that power the agents, or the compute required to train the models underneath.
Sloane Duvall
A curated reference of models from major AI labs, with open/closed weight status, input modalities, and context window size. American labs tend towards closed weights models and Chinese labs tend toward open weights models.
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